PCI Express* Architecture
Still Pushing the Limits of I/O Performance
PCI Express* Architecture
Introduced to replace the more limited parallel PCI* bus and extend I/O performance for the future, PCI Express* is a standards-based, bidirectional, point-to-point serial interconnect, capable of high-bandwidth data transfers up to 32 GB/s on a x16 connector with PCI Express* 3.0. PCI Express* supports enhanced features, such as scalable performance, power management, lower latencies, and hot swappable devices.
PCI Express* 3.0 – A New Era in I/O Performance
Upgraded in 2010, PCI Express* 3.0 doubles the data transfer rate over its predecessor, while maintaining backwards compatibility with versions 1.0 and 2.0. PCI Express* 3.0 provides the following:
- PCI software compatibility
- Scalable performance
- High-bandwidth, low pin-count implementations
- Cost effective silicon component designs
- Low overhead, low latency data transfers
- Maximized interconnect efficiency
- Improved power management capabilities
As a flexible, low-cost solution, PCI Express* is broadly adopted and software-compatible with all existing PCI-based software to enable smooth integration in future systems. Next-generation PCI Express* is currently in the definition stages of development. If you would like to provide input on requirements, please contact your company’s PCI-SIG representative.
The Future of PCI Express*
Increasing demand for richer application content drives faster, more advanced hardware and processing support in a wide range of devices. PCI Express* allows for increased performance and scalability for years to come. It's an ideal unifying solution in the development of a broad range of platforms and embedded devices.
Compatibility, Scalability, and Forward-thinking Design
Intel works with industry leaders to ensure the PCI standard is based on a robust specification to ensure compatibility for a multitude of products including CPUs, chipsets, chip-level interconnects, adapter cards, and device drivers. Providing extensive resources to developers, Intel and the PCI-SIG delivers specifications that are ultimately moving the industry towards more forward-thinking, scalable designs.
PCI Express* Architecture Resources
The Intel® developer network for PCI Express* Architecture is a developer community sponsored by Intel that helps you innovate faster and easier with access to whitepapers, specification drafts, and more. By joining, you will also gain easy access to the additional resources you need to design, develop, and deploy innovative solutions based on the widely supported standards-based Single Root I/O Virtualization (SR-IOV) architecture.